Fiber-Based Optical Alignment System

ABSTRACT

A low-cost alignment system suitable for aligning a wafer to a test fixture includes a bundle of optical fibers wherein at least one fiber serves to deliver illumination to the alignment target from an end thereof, and a plurality of receiver fibers, each having ends with a known spatial relationship to the end of the illuminator fiber. The ends of the fiber bundle have a known spatial relationship to the fixture. In some embodiments, the fiber bundle is disposed within the fixture such that there is an unobscured optical path between the wafer and the receiving and illuminating ends of the fibers. In some embodiments, the fiber bundle is coupled to a light source and a light sensor mounted on the fixture. In some embodiments the alignment target is one or more bonding pads disposed on a wafer.

CROSS-REFERENCE TO RELATED APPLICATIONS

This non-provisional application is a continuation of non-provisionalapplication Ser. No. 12/154,684, filed 24 May 2008, entitled“Fiber-Based Optical Alignment System”, which is a continuation ofapplication Ser. No. 11/799,550, filed 1 May 2007, and entitled,“Fiber-Based Optical Alignment System”.

FIELD OF THE INVENTION

The present invention relates generally to semiconductor test andmanufacturing equipment, and more particularly relates to methods andapparatus for aligning equipment to a wafer.

BACKGROUND

Advances in semiconductor manufacturing technology have resulted in,among other things, reducing the cost of sophisticated electronics tothe extent that integrated circuits have become ubiquitous in the modernenvironment.

As is well-known, integrated circuits are typically manufactured inbatches, and these batches usually contain a plurality of semiconductorwafers within and upon which integrated circuits are formed through avariety of semiconductor manufacturing steps, including, for example,depositing, masking, patterning, etching, implanting, annealing,planarizing and so on.

Completed wafers are tested to determine which die, or integratedcircuits, on the wafer are capable of operating according topredetermined specifications. In this way, integrated circuits thatcannot perform as desired are not packaged, or otherwise incorporatedinto finished products.

It is common to manufacture integrated circuits on roughly circularsemiconductor substrates, or wafers. Further, it is common to form suchintegrated circuits so that conductive regions disposed on, or close to,the uppermost layers of the integrated circuits are available to act asterminals for connection to various electrical elements disposed in, oron, the lower layers of those integrated circuits. These conductiveregions are typically referred to as pads. In testing, these pads arecommonly contacted with a probe card. Unfortunately, the dimensions, orarea, of pads have been decreasing which makes contacting such pads witha conventional probe card difficult and time consuming.

What is needed are lower-cost, less-complex apparatus and methods toincrease the efficiency of operations associated with testing theintegrated circuits of a wafer.

SUMMARY OF THE INVENTION

Briefly, a low-cost alignment system suitable for aligning a wafer to atest fixture includes a bundle of optical fibers wherein at least onefiber serves to deliver illumination to the alignment target from an endthereof, and a plurality of receiver fibers, each having ends with aknown spatial relationship to the end of the illuminator fiber. The endsof the fiber bundle have a known spatial relationship to the fixture. Insome embodiments, the fiber bundle is disposed within the fixture suchthat there is an unobscured optical path between the wafer and thereceiving and illuminating ends of the fibers. In some embodiments, thefiber bundle is coupled to both a light source and a light sensormounted on the fixture. In some embodiments the alignment target is oneor more bonding pads disposed on a wafer.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a cross-sectional view of a bond pad disposed on a dielectriclayer and further having a topside layer disposed over the dielectriclayer with openings therethrough exposing portions of the bond pad.

FIG. 2 is a cross-sectional view of bond pad on an integrated circuitand a fiber-based optical alignment apparatus in accordance with thepresent invention.

FIG. 3 shows an illustrative fiber-bundle in accordance with the presentinvention and its x-y position relative to a bonding pad of anintegrated circuit.

FIG. 4 shows an illustrative fiber-bundle in accordance with the presentinvention and its x-y position relative to a bonding pad of anintegrated circuit.

FIG. 5 shows an illustrative fiber-bundle in accordance with the presentinvention and its x-y position relative to a bonding pad of anintegrated circuit.

FIG. 6 shows an illustrative fiber-bundle in accordance with the presentinvention and its x-y position relative to a bonding pad of anintegrated circuit.

FIG. 7 shows an illustrative fiber-bundle in accordance with the presentinvention and its x-y position relative to a bonding pad of anintegrated circuit.

FIG. 8 shows an illustrative fiber-bundle in accordance with the presentinvention and its x-y position relative to a bonding pad of anintegrated circuit.

FIG. 9 shows an illustrative fiber-bundle in accordance with the presentinvention and its x-y position relative to a bonding pad of anintegrated circuit.

FIG. 10 shows an illustrative fiber-bundle in accordance with thepresent invention and its x-y position relative to a bonding pad of anintegrated circuit.

FIG. 11 shows an illustrative fiber-bundle in accordance with thepresent invention and its x-y position relative to a bonding pad of anintegrated circuit.

FIG. 12 shows an illustrative fiber-bundle in accordance with thepresent invention and its x-y position relative to a bonding pad of anintegrated circuit.

FIG. 13 shows an illustrative fiber-bundle in accordance with thepresent invention and its x-y position relative to a bonding pad of anintegrated circuit.

FIG. 14 is a flow diagram illustrating a method of aligning, inaccordance with the present invention, a wafer translator with a wafer.

DETAILED DESCRIPTION

Reference herein to “one embodiment”, “an embodiment”, or similarformulations, means that a particular feature, structure, operation, orcharacteristic described in connection with the embodiment, is includedin at least one embodiment of the present invention. Thus, theappearances of such phrases or formulations herein are not necessarilyall referring to the same embodiment. Furthermore, various particularfeatures, structures, operations, or characteristics may be combined inany suitable manner in one or more embodiments.

Terminology

Reference herein to “circuit boards”, unless otherwise noted, isintended to include any type of substrate upon which circuits may beplaced. For example, such substrates may be rigid or flexible, ceramic,flex, epoxy, FR4, or any other suitable material.

Pad refers to a metallized region of the surface of an integratedcircuit, which is used to form a physical connection terminal forsupplying power to, and communicating signals to and/or from theintegrated circuit. Although pads are normally constructed from a metalor metal alloy, any suitable conductive material may be used as long asthe optical reflectivity of the pad is different from the opticalreflectivity of the surrounding material, typically but not exclusivelythe topside passivation layer of an integrated circuit.

The expression “wafer translator” refers to an apparatus facilitatingthe connection of pads (sometimes referred to as terminals, I/O pads,contact pads, bond pads, bonding pads, chip pads, test pads, or similarformulations) of unsingulated integrated circuits, to other electricalcomponents. It will be appreciated that “I/O pads” is a general term,and that the present invention is not limited with regard to whether aparticular pad of an integrated circuit is part of an input, output, orinput/output circuit. A wafer translator is typically disposed between awafer and other electrical components, and/or electrical connectionpathways. The wafer translator is typically removably attached to thewafer (alternatively the wafer is removably attached to the translator).The wafer translator includes a substrate having two major surfaces,each surface having terminals disposed thereon, and electrical pathwaysdisposed through the substrate to provide for electrical continuitybetween at least one terminal on a first surface and at least oneterminal on a second surface. The wafer-side of the wafer translator hasa pattern of terminals that matches the layout of at least a portion ofthe pads of the integrated circuits on the wafer. The wafer translator,when disposed between a wafer and other electrical components such as aninquiry system interface, makes electrical contact with one or more padsof a plurality of integrated circuits on the wafer, providing anelectrical pathway therethrough to the other electrical components. Thewafer translator is a structure that is used to achieve electricalconnection between one or more electrical terminals that have beenfabricated at a first scale, or dimension, and a corresponding set ofelectrical terminals that have been fabricated at a second scale, ordimension. The wafer translator provides an electrical bridge betweenthe smallest features in one technology (e.g., pins of a probe card) andthe largest features in another technology (e.g., bonding pads of anintegrated circuit). For convenience, wafer translator is referred tosimply as translator where there is no ambiguity as to its intendedmeaning. In some embodiments a flexible wafer translator offerscompliance to the surface of a wafer mounted on a rigid support, whilein other embodiments, a wafer offers compliance to a rigid wafertranslator. The surface of the translator that is configured to face thewafer in operation is referred to as the wafer-side of the translator.The surface of the translator that is configured to face away from thewafer is referred to as the inquiry-side of the translator. Analternative expression for inquiry-side is tester-side.

The expression “edge extended wafer translator” refers to an embodimentof a translator in which electrical pathways disposed in and/or on thetranslator lead from terminals, which in use contact the wafer undertest, to electrical terminals disposed outside of a circumferential edgeof a wafer aligned for connection with, or attached to the edge extendedtranslator.

Inquiry system interface refers to apparatus disposed between theinquiry-side of a translator and an inquiry system. Inquiry systeminterfaces provide at least electrical pathways coupled between theinquiry-side of a translator and an inquiry system. Inquiry systeminterfaces may incorporate a variety of passive and/or active electricalcomponents, as well as a variety of mechanical devices for attaching,coupling, connecting, or communicating to the inquiry-side of atranslator and/or the inquiry system (e.g., a tester). Variousimplementations of inquiry system interfaces may be as simple as acircuit board that passes signals from one surface to the other, or maybe complex apparatus including active electronics, and mechanicaldevices suitable for placing, orienting and/or aligning the inquirysystem interface.

The expression “translated wafer” refers to a wafer/wafer translatorpair in the attached state, wherein a predetermined portion of, or allof, the contact pads of the integrated circuits on the wafer are inelectrical contact with corresponding electrical connection meansdisposed on the wafer-side of the translator. Typically, the wafertranslator is removably attached to the wafer. Removable attachment maybe achieved, for example, by means of vacuum, or pressure differential,attachment.

The terms chip, integrated circuit, semiconductor device, andmicroelectronic device are sometimes used interchangeably in this field.The present invention relates to the manufacture and test of chips,integrated circuits, semiconductor devices and microelectronic devicesas these terms are commonly understood in the field.

FIG. 1 illustrates a wafer with a bonding pad and a topside passivationlayer, with the topside passivation layer having an opening therethroughthat exposes a portion of the bond pad. More particularly, FIG. 1 showsa wafer 100 including a wafer substrate 102 with a dielectric layer 104disposed thereon, a bond pad 108 disposed on dielectric layer 104, and atopside passivation layer 106 disposed on dielectric layer 104. As shownin FIG. 1, topside passivation layer 106 has an opening 110 that exposesa portion of bonding pad 106. It is noted that an integrated circuittypically has a plurality of bonding pads. It is further noted that awafer having integrated circuits formed thereon typically has layers ofconductors, dielectric insulators, and active devices, which are notmaterial for describing the present invention and for simplicity ofillustration are not shown in FIG. 1.

Referring to FIG. 2, the wafer of FIG. 1 is shown in conjunction with ablock diagram representation of a fiber-based optical alignment systemin accordance with the present invention. More particularly, an opticalfiber holding means 202 is shown in cross-section, along with aplurality of receiver fibers 204 and an illumination fiber 206, each ofwhich passes through optical fiber holding means 202. Illumination fiber206 is optically coupled to a light source 208. Light source 208 may beany suitable illumination source including but not limited to visiblelight, infra-red light, or ultra-violet light. Receiver fibers 204 areoptically coupled to a light detector 210. Light detector 210 may be anysuitable means for detecting the amplitude of light signals reflectedfrom the bond-pad-side surface of wafer 100. In the illustrative exampleof FIG. 2, the bond-pad-side surface of wafer 100 corresponds to theexposed surface of topside passivation layer 106 and the exposed surfaceof bond pad 108.

In some embodiments of the present invention, optical fiber holdingmeans 202 may be a wafer translator that is being aligned to a wafer. Inother embodiments, optical fiber holding means 202 may be a fixturehaving a known spaced apart relationship to a wafer translator beingaligned to a wafer. Such a fixture may be formed from any suitablematerial, and is configured to secure the fibers of the fiber bundle ina know spatial relationship with each other. It may be beneficial foroptical fiber holding means 202 to be constructed from one or morematerials such that optical fiber holding means 202 is not a significantsource of particulate contamination, since it is preferable to keep thebond pads free from contamination.

Still referring to FIG. 2, light source 208 and light detector 210 areeach coupled to processing and control circuitry block 212. Processingand control circuitry block 212 provides control signals to, andreceives information from, light source 208 and light detector 210.Those skilled in the art and having the benefit of this disclosure willrecognize that control signals provided by circuitry block 212 may takeany suitable form, for example analog or digital, and will similarlyrecognize that processing and control circuitry block 212 may beimplemented as a microcontroller programmed to perform the appropriatecontrol operations, or may be implemented completely in hardware, forexample logic circuits without the need for stored program instructions.

It is noted that the illumination provided by light source 208 should bedetectable by light detector 210 after transmission through illuminationfiber 206, reflection from bonding pad 108, and transmission throughreceiver fibers 204.

The relative dimensions of the various layers and structures of wafer100 in FIGS. 1 and 2 are not necessarily drawn to scale, but are ratherfor illustrative purposes. It is further noted that the sidewalls ofopening 110 are slightly sloped rather than perfectly perpendicular tothe surface of bond pad 108. Since the sidewalls of opening 110 aresloping, the thickness of topside passivation layer 106 varies acrossthat portion of bond pad 108 that it overlaps. In some embodiments, thechanging thickness of topside passivation layer 106 at the edges of bondpad 108 may provide reflectivity properties that are different fromthose of both the bond pad metal and the passivation layer overdielectric layer 104.

Referring to FIGS. 3-13, an illustrative embodiment of the presentinvention is described. More particularly, FIG. 3 shows a bonding pad302, a fiber bundle 304, and the relative x-y positions of pad 302 andbundle 304. In this example, bonding pad 302 is disposed on anintegrated circuit, which is unsingulated, i.e., the integrated circuitis still in wafer form. Bonding pad 302, as shown, is the exposedportion of the pad metal, and for simplicity of illustration does notshow the pad metal that extends under a topside passivation layer (seeFIGS. 1-2).

It is noted that bundle 304 includes a central illuminating fiber 306and a plurality of receiver fibers 308 a-308 h (collectively referred toas 308). Bundle 304 may be permanently or removably attached to afixture that is to be aligned with pad 302. Regardless of whether bundle304 is permanently or removably attached, during the alignment processit is preferred that bundle 304 have a fixed spatial relationship to thefixture.

The general principles of operation are as follows. The reflectivity ofthe surface of a wafer is not uniform, and more particularly themetallized bond pads are more highly reflective than the surface of thetopside passivation layer, which is disposed over a dielectric layer. Byilluminating the surface of a wafer through an optical fiber andrecovering reflected light through a plurality of receiver fibers, whichhave a known spatial relationship to each other, a determination can bemade as to whether the bundle of optical fibers (illuminating andreceiver fibers together) is aligned to a bond pad. This determinationis made by evaluating the amount of reflected light delivered by each ofthe receiver fibers to the light detector, and moving the optical fiberbundle in a predetermined manner until the amount of reflected lightdelivered by each of the receiver fibers to the light detector is abovea predetermined threshold and substantially equal. By ensuring that thelight amplitude is above a predetermined threshold, it is possible todistinguish alignment to a pad from simply receiving substantially thesame reflected light from the passivation layer. It is noted that thepredetermined movement of the optical fiber bundle may be in x, y,theta, or any combination thereof. Since the bundle of optical fibershas a known spatial relationship to the apparatus which is to be alignedto the wafer, the spatial relationship between that apparatus and thewafer can be determined. With the spatial relationship between theapparatus to be aligned and the wafer having been determined, the twoelements can then be brought into contact, or otherwise operationallyengaged. In some embodiments the bundle of optical fibers is built intothe apparatus being brought into alignment with the wafer, in whichcase, when the optical fiber bundle is aligned the apparatus itself isaligned. In some embodiments the bundle of optical fibers has a knownspatial relationship to the apparatus to be aligned with the wafer, inwhich case, once the optical fiber bundle is aligned to the wafer, theapparatus can be moved in a known way so that it too is properlyaligned.

In operation, bundle 304 is disposed in the vicinity of a wafer, and alight of a predetermined frequency, or range of frequencies, is providedthrough illuminating fiber 306. A portion of the light reflected fromthe surface of the wafer is picked up by various ones of receiver fibers308. The reflected light that travels through receiver fibers 308 isreceived by a light detector, as described above in connection with FIG.2. In this illustrative embodiment, the light detector produces, foreach of receiver fibers 308, a signal representative of the amplitude ofthe reflected light signal delivered through each of receiver fibers 308(referred to as amplitude signals). Processing circuitry coupled to thelight detector determines, based at least in part on the amplitudesignals, whether all the receiver fibers are carrying substantially thesame amount of reflected light. If they are carrying substantially thesame amount of light, and are above a predetermined threshold thenalignment is complete. This predetermined threshold is set such thatsubstantially equal light from the receiver fibers when they are allequally over the passivation layer is not considered to be a completealignment. If all the receiver fibers are not carrying substantially thesame amount of reflected light, then the bundle of optical fibers ismoved in x, y, and/or theta and the process of illuminating the surfaceand evaluating the recovered light is repeated.

Referring to FIG. 3, bundle 304 is shown in cross-section disposed overa field portion of an integrated circuit, and offset in x and y from pad302. In this position, receiver fibers 308 a-308 h will receivesubstantially equal amounts of reflected light because they are alldisposed over a portion of the integrated circuit having substantiallyequal reflectivity. However, the amount of light delivered to the lightdetector through receiver fibers 308 a-308 h will be below thepredetermined threshold that is set such that the amount of lightrequired for making a determination that alignment is complete can onlybe received from the more highly reflective pad 302.

Referring to FIG. 4, it can be seen that bundle 304 has moved relativeto pad 302 as compared to the positions shown in FIG. 3. Receiver fibers308 a and 308 b recover some light reflected from pad 302, whereas theremainder of the receiver fibers only recover light from the lessreflective topside area of the integrated circuit. In this case, theprocessing and control circuitry determines that a pad edge has beendetected as a consequence of the move to the left (i.e., −x direction).

Referring to FIG. 5, it can be seen that, under control of theprocessing and control circuitry, bundle 304 is further moved left andup (i.e., −x and +y). In this case, receiver fibers 308 a and 308 brecover more light reflected from pad 302 (as compared to thearrangement of FIG. 4), whereas the remainder of the receiver fibersonly recover light from the less reflective topside area of theintegrated circuit. Processing and control circuitry recognizes that the−x and +y step has produced a result indicating that bundle 304 hasmoved closer to alignment with pad 302, and generates the controlsignals necessary to move bundle 304 again.

Referring to FIG. 6, it can be seen that, under control of theprocessing and control circuitry, bundle 304 is further moved left andup (i.e., −x and +y). Receiver fibers 308 a and 308 b recover still morelight reflected from pad 302 (as compared to the arrangement of FIG. 5),and receiver fiber 308 c is also starting to recover light from pad 302,whereas the remainder of the receiver fibers only recover light from theless reflective topside area of the integrated circuit.

Referring to FIG. 7, it can be seen that, under control of theprocessing and control circuitry, bundle 304 is further moved left andup (i.e., −x and +y). Receiver fibers 308 a and 308 b are fully disposedover pad 302, and receiver fibers 308 c, 308 d and 308 e are partiallyrecovering light from pad 302, whereas the remainder of the receiverfibers only recover light from the less reflective topside area of theintegrated circuit.

Based upon the amount of light received from the various receiverfibers, the processing and control circuitry determines that furthermoving to the left and up (i.e., −x and +y) will more closely alignbundle 304 with pad 302. As shown in FIG. 8, receiver fibers 308 a, 308b and 308 c are fully disposed over pad 302; receiver fibers 308 d and308 e are partially disposed over pad 302; and receiver fibers 308 f,308 g and 308 h are fully disposed over the field area.

Based upon the amount of light received from the various receiverfibers, the processing and control circuitry determines that furthermoving to the left (i.e., −x) will more closely align bundle 304 withpad 302. As shown in FIG. 9, receiver fibers 308 a, 308 b, 308 c, 308 dand 308 e are fully disposed over pad 302; and receiver fibers 308 f,308 g and 308 h are fully disposed over the field area.

Based upon the amount of light received from the various receiverfibers, the processing and control circuitry determines that furthermoving to the left (i.e., −x) will more closely align bundle 304 withpad 302. As shown in FIG. 10, receiver fibers 308 a, 308 b, 308 c, 308 dand 308 e are fully disposed over pad 302; and receiver fibers 308 f,308 g and 308 h are partially disposed over the field area.

Based upon the amount of light received from the various receiverfibers, the processing and control circuitry determines that furthermoving to the left (i.e., −x) will more closely align bundle 304 withpad 302. As shown in FIG. 11, receiver fibers 308 a, 308 b, 308 c, 308d, 308 e, 308 f, 308 g and 308 h are fully disposed over pad 302. Insome embodiments of the present invention, the processing and controlcircuitry determines that alignment is complete since all the receiverfibers are now recovering substantially the same amount of reflectedlight. In other embodiments, further actions are taken to ensure thatthe optical bundle is not only disposed over the pad, but that it iscentered over the pad.

Referring to FIG. 11, it can be seen that bundle 304 is disposed overpad 302, however processing and control circuitry generates the signalsneeded to move bundle 304, in this illustrative case to the left (i.e.,−x). Referring to FIG. 12, bundle 304 has moved such that receiverfibers 308 a, 308 b and 308 c are only partially disposed over pad 302and consequently the amount of light received from those receiver fibersis diminished as compared to the amount recovered in their immediatelypreceding position. This diminution of recovered light indicates thatbundle 304 has traveled too far to the left (i.e., −x direction), andtherefore bundle 304 should move back to its previous position. As canbe seen in FIG. 13, processing and control circuitry has directed bundle304 to move to the right (i.e., +x). Having returned to the position ofwherein all the receiver fibers are recovering substantially the sameamount of light above a predetermined threshold, the alignment processis complete.

The present invention is not limited to a single illuminating fiber perbundle. Various alternative embodiments may have more or fewer receiverfibers than the eight receiver fibers shown in this illustrativeembodiment. In various alternative embodiments the fibers are spacedapart from each other rather than touching as shown in FIGS. 3-13.

In some embodiments, the optical fiber bundle is moved as describedabove until alignment is reached, and then the optical fiber bundle ismoved out of the way so that an apparatus, for example, a wafertranslator having a known spatial relationship with the optical fiberbundle, can be moved into an aligned position using the coordinateinformation (x, y, theta) of the optical fiber bundle's alignedposition.

In some embodiments, a determination is made regarding whether the lightlevel, i.e., amplitude, of the reflected light returned by the receiverfibers is within a predetermined range. If this light level is below thepredetermined range then a signal or message is generated by theprocessing and control circuitry indicating that insufficient reflectedlight is available to reliably perform the alignment operation.

In some embodiments, the determination as to whether the amplitudes ofthe reflected light delivered by the receiver fibers to the lightdetector are substantially equal is accomplished by finding the largestand smallest amplitudes and determining that the difference between thelargest and smallest amplitudes is within a predetermined threshold ofeach other.

In some embodiments, the determination as to whether the amplitudes ofthe reflected light delivered by the receiver fibers to the lightdetector are substantially equal is accomplished by comparing theamplitudes of the light from each of the receiver fibers and determiningthat those amplitudes are all within a predetermined range.

In some embodiments, the determination as to whether the amplitudes ofthe reflected light delivered by the receiver fibers to the lightdetector are substantially equal is accomplished by evaluating the lightreceived from only a subset of the plurality of receiver fibers.

In some embodiments, alignment to a “dark” target is desired. By darktarget, it is meant that the target structure for alignment is lessreflective than the remaining field area. In such a case, the process isslightly different than described above in connection with aligning to atarget that is more highly reflective than the surrounding field area.In aligning to a dark target, the determination of alignment is made byevaluating the amount of reflected light delivered by each of thereceiver fibers to the light detector, and moving the optical fiberbundle in a predetermined manner until the amount of reflected lightdelivered by each of the receiver fibers to the light detector is belowa predetermined threshold and substantially equal.

In some embodiments, illumination is supplied through the illuminationfiber continuously during the alignment process. In other embodiments,illumination is supplied through the illumination fiber at predeterminedtimes, such as, for example, when the optical fiber bundle is stopped ata position where an alignment reading is to take place.

In some embodiments the x, y, and/or theta steps are always a fixedamount. In other embodiments, these step sizes may be varied, based, atleast in part, upon a determination that the optical fiber bundle isover a field area as opposed to partly over field and partly over a pad.By using larger steps when the bundle is over a field area and smallersteps when at least partly over a pad, the speed and accuracy of thealignment process are improved.

FIG. 14 illustrates a method of aligning a fixture, such as a wafertranslator, to a substrate in accordance with the present invention.Such a method includes illuminating 1402 at least a portion of asubstrate surface; receiving 1404 a light signal from each of aplurality of receiver fibers; determining 1406 an amplitude of the lightsignal from each of the plurality of receiver fibers; and generating1408, if the amplitude of the light signal from each of the plurality ofreceiver fibers is above a first predetermined threshold, and issubstantially equal, a first signal, the first signal indicating thatalignment is complete.

CONCLUSION

The exemplary methods and apparatus illustrated and described hereinfind application in the field of integrated circuit test and analysis.

It is to be understood that the present invention is not limited to theembodiments described above, but encompasses any and all embodimentswithin the scope of the subjoined Claims and their equivalents.

1. A method of aligning a fixture to a substrate, comprising: a)providing at least one illumination fiber coupled at a first end thereofto a light source, and a plurality of receiver fibers, each receiverfiber coupled, at a respective first end thereof, to a correspondingdetector; b) illuminating at least a first portion of a substratesurface with light from a second end of the at least one illuminationfiber; c) receiving light reflected from the first portion of thesubstrate surface at the respective second ends of the receiver fibers,and receiving, at the detectors, a light signal from each of a pluralityof receiver fibers; d) determining an amplitude of the light signal fromeach of the plurality of receiver fibers; e) changing, if thedetermination of (d) is that the amplitude of the light signal from eachof the plurality of receiver fibers is substantially equal and above apredetermined threshold, the x-y-theta position of the at least oneillumination fiber and the plurality of receiver fibers, relative to thesubstrate, by a predetermined amount; f) illuminating at least a portionof a second portion of the substrate surface with light from the secondend of the at least one illumination fiber; g) receiving light reflectedfrom the second portion of the substrate surface at the respectivesecond ends of the receiver fibers, and receiving, at the detectors, alight signal from each of a plurality of receiver fibers; h) determiningan amplitude of the light signal from each of the plurality of receiverfibers; and i) changing, if the determination of (h) is that theamplitude of the light signal from each of the plurality of receiverfibers is not substantially equal, the x-y-theta position of the atleast one illumination fiber and the plurality of receiver fibers,relative to the substrate, back to its position prior to the change ofstep (e); wherein the light source and detectors are disposed on anedge-extended wafer translator, and the substrate is a semiconductorwafer including a field area and at least one target structure.